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L3000S L3092
SLIC KIT OPTIMIZED FOR APPLICATIONS WITH BOTH FIRST AND SECOND GENERATION COMBOS
PROGRAMMABLE DC FEED RESISTANCE AND LIMITING CURRENT (25/40/60mA) LOW ON-HOOK POWER DISSIPATION (50mW typ) SIGNALLING FUNCTION (off-hook/GND-Key) QUICK OFF-HOOK DETECTION IN CVS FOR LOW DISTORTION (< 1 %) DIAL PULSE DETECTION HYBRID FUNCTION RINGING GENERATION WITH QUASI ZERO OUTPUT IMPEDANCE, ZERO CROSSING INJECTION (no ext. relay needed) AND RING TRIP DETECTION ABSOLUTELY NO NOISE INJECTED ON ADIACENT LINES DURING RINGING SEQUENCE AUTOMATIC RINGING STOP WHEN OFFHOOK IS DETECTED TEST MODE ALLOWS LINE LENGHT MEASUREMENT PARALLEL LATCHED DIGITAL INTERFACE LOW NUMBER OF EXTERNAL COMPONENTS WITH STANDARD TOLERANCE ONLY : 9 1% RESISTORS AND 5 10-20% CAPACITORS (for 600 ohm appl.) POSSIBILITY TO WORK ALSO WITH HIGH COMMON MODE CURRENTS GOOD REJECTION OF THE NOISE ON BATTERY VOLTAGE (20dB at 10Hz ; 35dB at 1KHz) INTEGRATED THERMAL PROTECTION SURFACE MOUNT PACKAGE (PLCC28 + PowerSO-20) -40C TO 85C: L3000S/L3092
DIP28 ORDERING NUMBER: L3092N
FLEXIWATT15 ORDERING NUMBER: L3000SX-VC
PLCC28 ORDERING NUMBER: L3092FN
PowerSO20 (slug-up) ORDERING NUMBER: L3000SX
PowerSO20 (slug-down) ORDERING NUMBER: L3000SX-77
DESCRIPTION The SLIC KIT (L3000S/L3092) is a set of solid state devices designed to integrate many of the functions needed to interface a telephone line. It consists of 2 integrated devices ; the L3000S line interface circuit and the L3092 control unit. The kit implements the main features of the BORSHT functions: - Battery feed (balance mode) - Ringing Injection - Signalling Detection
December 1997
- Hybrid Function The SLIC KIT injects the ringing signal in balanced mode and requires a positive supply voltage of typically + 72V to be available on the subscriber card. The L3000S/L3092 kit generates the ringing signal internally, avoiding the requirement for expensive external circuitry. A low level 1.5Vrms input is required. (This can be provided by the combo). A special operating mode limits the SLIC KIT power dissipation to 50mW in on-hook condition keeping the on/off hook detection circuit active. Through the Digital Interface it is also possible to set an operating mode that allows measurements of loop resistance and therefore of line lenght. This kit is fabricated using a 140V Bipolar technology for L3000S and a 12V Bipolar I2L technology for L3092. Both devices are available PTH application (FLEXIWATT15 and DIP28) or SMD application (PowerSO-20 and PLCC28). This kit is specially suitable to Private Automatic Branch Exchange (PABX) and Low Range C.O. Applications.
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This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
L3000S - L3092
PIN CONNECTIONS
DIP28
FLEXIWATT15
PLCC28
VBN.C. TIP MNT VB+ BGND VDD VIN VBIM VB-
1 2 3 4 5 6 7 8 9 10
D97TL290
20 19 18 17 16 15 14 13 12 11
VBRING N.C. IL IT C2 C1 REF AGND V B-
V BVBIM V IN V DD BGND VB+ MNT TIP N.C. V B-
10 9 8 7 6 5 4 3 2 1
D94TL125
11 12 13 14 15 16 17 18 19 20
VBAGND REF C1 C2 IT IL N.C. RING VB-
PowerSO20 (slug-down)
PowerSO20 (slug-up)
ABSOLUTE MAXIMUM RATINGS
Symbol V b- Vb+ |Vb-|+|V b+| Vdd Vss Vagnd-V bgnd Tj Tstg Negative Battery Voltage Positive Battery Voltage Total Battery Voltage Positive Supply Voltage Negative Supply Voltage Max. Voltage between Analog Ground and Battery Ground Max. Junction Temperature Storage Temperature Parameter Value -80 80 140 +6 -6 5 +150 -55 to +150 Unit V V V V V V C C
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L3000S - L3092
THERMAL DATA
Symbol Parameter L3000S HIGH VOLTAGE R th j-case Thermal Resistance Junction to case (FLEXIWATT15) Rth j-amb Thermal Resistance Junction to ambient (FLEXIWATT15) R th j-case Thermal Resistance Junction to case (PowerSO-20) Rth j-amb Thermal Resistance Junction to ambient (PowerSO-20) L3092 LOW VOLTAGE Rth j-amb Thermal Resistance Junction to ambient Value Max. Max. Typ. Max. Max. 4 50 2 60 80 Unit C/W C/W C/W C/W C/W
OPERATING RANGE
Symbol Toper V b- Vb+ |Vb-|+|V b+| Vdd Vss Imax Parameter Operating Temperature Range for L3000S/L3092 Negative Battery Voltage Positive Battery Voltage Total Battery Voltage Positive Supply Voltage Negative Supply Voltage Total Line Current (IL + IT) Min. -40 -70 0 +4.5 -5.5 Typ. -48 +72 120 Max. +85 -20 +75 130 +5.5 -4.5 85 Unit C V V V V V mA
PIN DESCRIPTION (L3000S)
FLEX. N 1 2 3 4 5 6 7 SO-P. N 3 4 5 6 7 8 9 Name TIP MNT VB+ BGND VDD VIN VBIM Description A line termination output with current capability up to 100mA (Is is the current sourced from this pin). Positive Supply Voltage Monitor. Positive Battery Supply Voltage. Battery ground relative to the VS+ and the VB- supply voltages. It is also the reference ground for TIP and RING signals. Positive Power Supply +5V. 2 wire unbalanced voltage input. Output voltage without current capability, with the following functions: - give an image of the total battery voltage scaled by 40 to the low voltage part. - filter by an external capacitor the noise on . Negative Battery Supply Voltage. Analog Ground. All input signals and the VDD supply voltage must be referred to this pin. Voltage reference output with very low temperature coefficient. The connected resistor sets Internal circuit bias current. Digital signal input (3 levels) that defines device status with pin 12. Digital signal input (3 levels) that defines device status with pin 11. High precision scaled transversal line current signal. Ia + Ib IT =
8 9 10 11 12 13
1,10,11, 20 12 13 14 15 16
VBAGND REF C1 C2 IT
100
14
17
IL
Scaled longitudinal line current signal.
IL =
Ia - Ib
100
15 -
19 2, 18
RING N.C.
B line termination output with current capability up to 100mA (Ib is the current sunk into this pin). Not connected.
Notes: 1) Unless otherwise specified all the diagrams in this datasheet refers to the FLEXIWATT15 pin connection. 2) All information relative to the PowerSO-20 package option should be considered as advanced information on a new product now in developement or undergoing evaluation. Details are subject to change without notice.
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L3000S - L3092
PIN DESCRIPTION (L3092)
N 1 Name VOUT Description Two wire unbalanced output carryng out the following signals reduced by 40: 1) DC voltage to perform the proper DC characteristic. 2) Ringing Signal 3) Voice Signal AC line Impedance Adjustment Protection Resistances Compensation Transmit Amplifier Output Comparator Input. This is the input comparator that senses the line voltage in power down and in automatic stand-by, allowing off hook detection in this mode. Aut. Input. It is a part of the digital interface. Loaded when CS is low. Master Reset Input. When it is connected to ground the SLIC is forced in power down. It has an internal pull-up. (typ. 200K) (*) Power on/power off input. This input is part of digital interface. Loaded when CS is low. Ring Enable Input. This input is part of the digital interface. Loaded when CS is low. Chip Select Input. Ground Key Output Enabled by CS Low. On Hook/off Hook Output Enabled by CS Low. State control Signal 2. State Control Signal 1. Combination of C1 and C2 define operating mode of the high voltage part. Low Level Ringing Signal Input. Ring Trip Detection Longitudinal Line Current Input Ib - Ia IL = 100 DC Feeding System Transversal Line Current Input Ia + Ib IT = 100 AC - DC Feedback Input. Positive Supply Voltage, +5V. Bias Setting Pin. Negative Supply Voltage, -5V. Analog and Digital Ground. Limiting Current Selection Input. Loaded when CS is low. Power Down Output. Driving the high voltage part L3000S through the bias resistor RH. TX Amplifier Negative Input performig the two to four wire conversion. In case of application with 2nd Generation COMBO performing also the echo cancellation (ex TS5070/5071), this pin must be connected to GND. AC Feedback Input. AC Line Impedance Synthesis.
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
RPC TX COMP AUT MR PWON RING CS GDK ONHK C2 C1 RGIN CRT IL
17 18
RDC IT
19 20 21 22 23 24 25 26
ACDC VDD REF VSS GND LIM PDO ZB
27 28
CAC ZAC
(*) Must be connected to a proper capacitor for power on reset or to VDD if not used. Should not be left open.
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L3000S - L3092
L3000S BLOCK DIAGRAM
L3000S
L3092 BLOCK DIAGRAM
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L3000S - L3092
FUNCTIONAL DIAGRAM
L3000S
FUNCTIONAL DESCRIPTION L3000S - HIGH VOLTAGE CIRCUIT The L3000S line interface provides battery feed for telephone lines and ringing injection. Both these operations are done in Balance Mode. This is very important in order to avoid the generation of common mode signals in particular during the pulse dialling operation of the telephone set connected to the SLIC. The IC contains a state decoder that under external control can force the following operational modes : stand-by, conversation and ringing. In addition Power down mode can be forced connecting the bias current resistor to VDD or leaving it open. Two pins, IL and IT, carry out the information concerning line status which is detected by sensing the line current into the output stage. The L3000S amplifies both the AC and DC signals entering at pin 6 (VIN) by a factor equal to 40. Separate grounds are provided : - Analog ground as reference for analog signals - Battery ground as a reference for the output stages The two ground should be shorted together at a low impedance point.
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L3092 - LOW VOLTAGE CIRCUIT The L3092 Low Voltage Control Unit controls the L3000S line interface module providing set up data to set line feed characteristics and to inject ringing. An on chip digital parallel interface allows a microprocessor or a second generation COMBO as the TS5070 to control all the operations. L3092 defines working states of Line Interface Circuit and also informs the card controller about line status. L3000S WORKING STATES In order to carry out the different possible operations, the L3000S has several different working states. Each state is defined by the voltage respectively applied by pin 12 and 13 of L3092 to the pins 12 and 11 of L3000S. Three different voltage levels (-3, 0, +3) are available at each connection, so defining nine possible states as listed in tab. 1. Appropriate combinations of two pins define four of the five possible L3000S working states that are: a) Stand-by (SBY) b) Conversation (CVS)
L3000S - L3092
Table 1.
Pin 12 of L3092 Pin 12 of L3000S (C2) +3 Pin 13 of L3092 (C1) Pin 11 of L3000S +3 0 -3 Stand-by Not Used Not Used 0 Conversation B.B Ringing -3 Not Used Not Used Not Used
c) Ringing (RING) d) Boost Battery (BB),(see Appendix B). The fifth status, Power down (PD), is set by the output pin PDO of the L3092 that disconnect the Bias Resistor, RH, of L3000S from ground. The main difference between Stand-by and Power down is that in SBY the power consumption on the voltage battery VB- (- 48V) is reduced but the L3000S DC Feeding and monitoring circuits are still active, in PD the power consumption on VB- is reduced to zero, and the L3000S is completely switched off. SLIC OPERATING MODES Through the L3092 Digital Interface it is possible to select six different SLIC OPERATING MODES : 1) Conversation or Active Mode (CVS) 2) Stand - By Mode (SBY) 3) Power - Down Mode (PD) 4) Automatic Stand - By Mode (ASBY) 5) Test Mode (TS) 6) Ringing Mode (RNG) 1) CONVERSATION (CVS) OR ACTIVE MODE This operating mode is set by the control processor when the Off hook condition has been recognized, As far as the DC Characteristic is concerned two different feeding conditions are present : a) Current limiting region : the DC impedance of the SLIC is very high (> 20K) and therefore the system works like a current generator. By the L3092 Digital Interface it is possible to selects the value of the limiting current.: 60mA, 40mA or 25mA. b) A standard resistive feeding mode : the characteristic is equal to a battery voltage (VB-) minus 5V, in series with a resistor, whose value is set by external components (see external component list of L3092). Switching between the two regions is automatic without discontinuity, and depends on the loop resistance. The SLIC AC characteristics are guaranteed in both regions. Fig. 1 shows the DC characteristic in conversa-
tion mode. Fig. 2 shows the line current versus loop resistance for two different battery values and RFS = 200. The allowed maximum loop resistance depends on the values of the battery voltage (VB), on the RFS and on the value of the longitudinal current (IGDK). With a battery voltage of 48V, RFS = 200 and IGDK = 0mA, the maximum loop resistance is over 3000 and with IGDK = 20mA is about 2000 (see Application Note on maximum loop resistance for L3000S/L3092 SLIC KIT). In conversation mode the AC impedance at the line terminals is synthetized by the external components ZAC and RP, according to the following formula : ZAC + 2 RP ZML = 25 Depending the characteristic of the ZAC network, ZML can be either a pure resistance or a complex impedance. This allows for ST SLIC to meet different standards as far as the return loss is concerned. The capacitor CCOMP guarantees stability to the system. The two to four wire conversion is achieved by means of a circuit that can be represented as a Wheatstone bridge, the branches of which being: 1) The line impedance (Zline). 2) The SLIC impedance at line terminals (ZML). 3) The balancing network ZA connected between RX input and ZB pin of L3092. 4) The network ZB between ZB pin and ground that shall copy the line impedance. It is important to underline that ZA and ZB are not equal to ZML and to Zline. They both must be multiplied by a factor in the range of 10 to 25, allowing use of smaller capacitors. In case the L3000S/L3092 kit is used with a second generation programmable COMBO (EG TS5070FN) which is able to perform the two to four wire conversion, the two impedances ZA and ZB can be removed and the ZB pin connectedto GND. The -6dB Tx gain of the L3000S/L3092SLIC kit in fact allows to keep the echo signal always within the COMBO Hybrid Balance Filter dynamic range. In conversation mode, the L3000S dissipates about 250mW for its own operation. The dissipation related to the current supplied to the line shall be added, in order to get the total dissipation.
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L3000S - L3092
In the same condition the power dissipation of L3092 is typically 100mW. Figure 1: DC Characteristics in Conversation Mode When the SLIC is in Stand-by mode, the power dissipation of L3000S does not exceed 120mW from - 48V) eventually increased of a certain amount if some current is flowing into the line. The power dissipation of the L3092 in the same condition is typically 50mW. SBY Mode is usually selected when the telephone is in on-hook. It allows a proper off-hook detection also in presence of high common mode line current or with telephone set sinking few milliAmpere of line current in on hook condition. Figure 3: DC Characteristics in Stand-by Mode
Figure 2: Line Current versus Loop Resistance RFS = 200; Limiting Currents: 25/40/60mA
2) STAND-BY (SBY) MODE In this mode the bias currents of both L3000S and L3092 are reduced as only some parts of the two circuits are completely active, control interface and current sensors among them. The current supplied to the line is limited at 10mA, and the slope of the DC characteristic corresponds to 2 x RFS. The AC characteristic in Stand-by corresponds to a low impedance (2 x RP) In Stand-by mode the line voltage polarity is just in direct condition, that is the TIP wire more positive than the RING one as in Conversation Mode.
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3) POWER DOWN (PD) MODE In this mode the L3000S present a high impedance (> 1 Mohm) to the line and cannot feed any line current. The L3092 forces L3000S in Power Down disconnecting its bias Resistor, RH, from the ground through the output pin PD0. The power dissipation from the battery voltage (- VB) is almost equal to zero and the power dissipation of L3092 is typically 50mW. The PD mode is normally used in emergency condition but can be used also in normal on-hook condition. In this case the off-hook detection is performed using the line sense comparator integrated in the L3092. The fig. 4 shows the functional circuit to perform the off hook detection in Power down mode. The resistor RR and RT feed the line current. The voltage at the terminal of the resistor RS connected to RING wire is normally - 48V. When there is a loop resistor between TIP and
L3000S - L3092
ter the detection of a low level on the ONHK outRING wires the voltage will increases to - 24V. put pin, it is suggested to set the SLIC in StandThe comparator C1 will change its output voltage by. In this operating mode the off-hook detection from low to high level. circuit is not sensitive to the line common mode If the Chip Select input (CS) is low the ONHK outsignal. put pin will be set to low level (+ 0V) indicating If in Stand-by Mode the off-hook detection is not that the off hook condition is present. confirmed (ONHK output set to high level) we This off-hook detection circuit can be influenced suggest after few second to set the SLIC again in by common mode signal present on RING TermiPower Down Mode. nal. The capacitor Cs is used to filter this common Total operation is managed by line card controlmode signal. ler. In the case of very high common mode signal afFigure 4: Off-hook Detection Circuit in Power Down Mode
L3000S
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L3000S - L3092
Figure 5: Off-hook Detection Circuit in Automatic Standby Mode
L3000S
4) AUTOMATIC STAND - BY (ASB) MODE This is an operating mode similar to the Power Down Mode, but with the software procedure to detect off-hook condition integrated in hardware on chip. Fig. 5 shows the functional circuit activated in this mode. When the off-hook condition occurs RING wire voltage goes high (from - 48V to - 24V). The output of the comparator C1 will go high setting the output of the flip - flop FF high. Therefore L3092 will set L3000S in Stand-by providing a ground signal at pin PDO. At the same time the external capacitor CINT will be slowly charged. In Stand-by the internal off-hook Detection circuit will be activated and will check if the off-hook condition detected by the comparator C1 was true or not true. If the off-hook condition is confirmed the SLIC will be kept in Stand-by Mode and the output ONHK will go low when CS is low. If the off-hook condition is not confirmed the SLIC will be kept in Stand - By only for a few seconds. (typ. 5sec). When the voltage at CRT out put will reach the VREF value the C2 comparator will reset the FF Flip - Flop and therefore the SLIC will be set again in Power Down. The Automatic Stand-by (ASBY) Mode combine the key characteristics of Power Down (PD) and
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Stand-by (SBY) Modes in particular it is characterized by a very low power consumption (as the Power Down mode) and a sophisticated off hook detection circuit (as the Stand-By mode). The card controller will receive the off-hook information from the pin ONHK only after that it is checked and confirmed by the internal off-hook detector that is not sensitive to spikes and common mode line signal. Therefore the software required to manage the SLIC will be very simple. 5) TEST (TS) MODE When this mode is activated the SLIC will be set in conversation mode keeping the initial value of limiting current. The GDK output pin of L3092 Digital Interface will be set to "0" if the SLIC is operating in the limiting current region of the DC characteristic, see fig. 1 and 2. GDK output will be set to 1 if the SLIC is operating in the resistive region. The SLIC will work in one of the two region depending on the loop resistance and the programmed limiting current value. By changing the liming current value selected in conversation mode it is possible to measure the Loop Resistance and therefore the line lenght connected to the SLIC. The following table shows the ranges of the loop resistance that set the GDK output pin to high and low level in correspondance of all the possible limiting current values (25/40/60mA) with RFS = 200.
L3000S - L3092
Limiting Current 60mA 40mA 25mA GDK = 0 (0 - 300) ohm (0 - 650) ohm (0 - 1300) ohm GDK = 1 >300 ohm >650 ohm >1300 ohm
If, for example, the loop resistance is 400 the GDK output will be 0 only when the limiting current value is 40 or 25mA. The card controller can program consecutive Test Mode and Conversation Mode with different limiting current in order to individuate the range of loop resistance as shown in the flow chart of fig. 6. The information of the Loop Resistance Range Figure 6: Procedure for Loop Resistance Evaluation.
can be very useful to optimize the transmission characteristics of the Line Card to each line. For example, if a second generation COMBO like TS5070 is used the Card Controller can use this information to change the Tx, RX Gains and echo cancellation characteristics into the programmable COMBO improving the quality of the system.
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L3000S - L3092
6) RINGING MODE When the ringing function is selected by the control processor a low level signal (1.5Vrms) with a frequency in the range from 16 to 70Hz, permanently applied to the L3092 (pin RGIN), is amplified and injected in balanced mode into the line through the L3000S with a super imposed DC voltage of 24V typ. This low level sinewave can be obtained also from COMBO connecting RGIN pin to RX COMBO output with a decoupling capacitor. The first and the last ringing cycles are synchronized by the L3092 so that the ringing signal always starts and stops when the line voltage crosses zero. When this mode is activated, the L3000S operates between the negative and the positive battery voltages typically - 48V and + 72V. The impedance to the line is just equal to the two external resistors (typ. 100). Ring trip detection is performed autonomously by the SLIC, without waiting for a command from the control processor, using a patented system which allows detection during a ringing burst ; when the off-hook condition is detected, the SLIC stops the ringing signal and forces the Conversation Mode. In this condition, if CS = 0V, the output pin ONHK goes to 0V. After the detection of the ONHK = 0, the Card Controller must set the SLIC in Conversation Mode to remove the internal latching of the
Operating Mode RNG Conversation 25mA Conversation 40mA Conversation 60mA Stand-by Automatic Stand-by Power-down Test Mode Ringing (CVS 25mA) Ringing (CVS 40mA) Ringing (CVS 60mA) 0 0 0 0 1 1 0 1 1 1 Input Pin PWON 1 1 1 0 0 0 0 1 1 1 AUT 1 0 0 0 1 0 1 1 0 0 LIM X 1 0 X X X X X 1 0 C1 Comparator Output 1 on-hook 0 off-hook Disable 0 Limiting Region 1 Resistive Region Disable ONHK 1 on-hook 0 off-hook
On/Off hook information. CONTROL INTERFACE BETWEEN THE SLIC AND THE CARD CONTROLLER The SLIC states and functions are controlled by microprocessor or interface latches of a second generation combo through seven wires that define a parallel digital interface. The seven pins of the digital interface have the following functions : - Chip select input (CS) - Power on/off input (PWON) - Ring enable input (RNG) - Automatic SBY input (AUT) - Limiting current input (LIM) - On hook/Off hook detection output (ONHK) - Ground Key detection output (GDK) The four input pins PWON, RNG, AUT and LIM, set the status of the SLIC as shown in the following table. The output pin ONHK is equals to 0V when the line is in OFF hook condition (lline > 7,5mA) and is equal to + 5V when the line is in On hook condition (Iline < 5,5mA). The output pin GDK monitors the ground key function when the SLIC is in Conversation (CVS) Mode and the DC operating region (limiting or resistive) in Test (TS) Mode. When the SLIC is in Conversation (CVS) Mode and IGDK (longitudinal current) > 12mA, pin GDK is set to 0V ;
Output Pin GDK 1 Ground key not detected. 0 Ground key detected. Disable
N.B. : When Ringing Mode is selected, you must choose also which of the three possible Conversation Modes. The SLIC will automatically select if Off-Hook condition will be detected during ringing.
When IGDK < 8mA, pin GDK set to + 5V The longitudinal current (IGDK) is defined as follows : Ib - Ia IGDK = 2
Where Ia is the current sourced from pin TIP and Ib is the current sunk into pin RING. The CS input pin allows to connect the I/O pins of the digital interfaces of many SLIC together.
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L3000S - L3092
It is possible to do it because : When the CS = + 5V the output pins (ONHK, GDK) are in high impedance condition (> 100K). The signals present at the input pins are not transfered into the SLIC. When the CS = 0V the output pins change in function of the values of the line current (Iline) and the longitudinal current (IGDK). The operating status of the SLIC are set by the voltage applied to the input pins. The rising edge of the CS signal latches the signal applied to the input pins. The status of the SLIC will not change until the CS signal will be again equal to zero. See timings fig 7 & 8. An additional input pin MR (Master Reset) can be useful during the system start up phase or in emergency condition. In fact when this pin is set to "0" the SLIC will be set in POWER DOWN MODE. This pin has an internal pull-up resistor of about 200K EXTERNAL COMPONENTS LIST To set up the SLIC kit into operation, the following parameters have to be defined : - The DC feeding resistance RFS, defined as the resistance of each side of the traditional feeding system (most common value for RFS are 200, 400 or 500). - The AC input/output SLIC impedance at line terminals, ZML, to which the return loss measurement is refered. It can be real (typically 600) or complex. - The equivalent AC impedance of the line Zline used for evaluation of the trans-hybrid loss (2/4 wire conversion). It is usually a complex impedance. - The frequency of the ringing signal Fr (SLIC can work with this frequency ranging from 16 to 68Hz). - The value of the two resistors RP in series with the line terminals ; main purpose of the a.m. resistors is to allow primary protection to fire.. With these assumptions the following components list is defined :
Figure 7: Typical Application Circuit
L3000S
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L3000S - L3092
EXTERNAL COMPONENT LIST FOR THE L3000S
Component Ref RH RP CDVB CVB+ CVBDS Value 22.5K 2% 30 to 100 47F - 20V 20% 0.1F - 100V 20% 0.1F - 100V 20% (note 1) BAT49X (note 2) Bias Resistor Lines Series Resistor Battery Voltage Rejection Positive Battery Filter Negative Battery Filter Protective Shottky Diode Involved Parameter or Function
EXTERNAL COMPONENT LIST FOR THE L3092
CVSS CVDD CAC ZAC CCOMP 1 0.1F - 15V 0.1F - 15V 47F - 10V 20% 25 x (ZML - 2xRP) Negative Supply Voltage Filter Positive Supply Voltage Filter AC Path Decoupling 2 Wire AC Impedance AC Loop Compensation
2fo ( 50 RP )
RPC RDC RL ZA ZB CINT RT RR RS CS CMR
with fo = 200KHz
25 x (2xRP) 2 x (RFS - RP) 63.4K 1% K x ZML (note 3) 25 x CCOMP ) (note 4) ( K x Zline ) ( K see Table 2 (note 5) 47K 47K 1.5M (note 6) 47nF 100nF
R P Insertion Loss Compensation DC Feeding Resistor (RDC > 200) Bias Resistor SLIC Impedance Balancing Network Line Impedance Balancing Network Ring Trip Detection Time Constant Resistors used only in the automatic stand-by mode. To be used only if high common mode rejection in Aut. SBY mode and in Power Down mode is requested (note 7) To be used only if Power on reset requested. The capacitor value depends on VDD rise time.
Notes: 1) In case line cards with less than 7 subscribers are implemented CVB- capacitor should be equal to 680nF/N where N is the number of subscriber per card. 2) This shottky diode or equivalent is necessary to avoid damage to the device during hot insertion or in all those cases when a proper power up sequence cannot be guaranteed. In case the Shottky diode is not implemented the power sequence should guarantee that VB+ is always the last supply applied at power on and the first removed at power off. In case an other shottky diode type is adopted it must fulfill the following characteristics: VF < 450mV @ IF = n 15mA, Tamb = 25C VF < 350mV @ IF = n 15mA, Tamb = 50C (TjL3000S = 90C) VF < 245mV @ IF = n 15mA, Tamb = 85C (TjL3000S = 120C) Where n is the number of line sharing the same diode. 3) The structure of this network shall copy the SLIC output impedance multiplexed by a factor K = 10 to 25. This network must be removed when 2/4 wire conversion is implemented with 2nd generation COMBO (EG. TS5070). 4) The structure of this network shall copy the line impedance, Zline, multiplexed by a factor K = 10 to 25 and compensate the effect of CCOMP on transhybrid rejection. This network must be removed when 2/4 wire conversion is implemented with 2nd generation COMBO (EG. TS5070). 5) The CINT value depends on the ringing frequency FR. 6) Value related to Vb = 48V application, for application with different battery voltages should be properly dimensioned (see Fig.4). 7) Ex.: For line leakage resistance to GND equal to 500K, the common mode rejection is 5VP without CS and about 10Vp with CS -
Table 2
Fr (Hz) CINT (nF) 16/18 680 19/21 580 22/27 470 28/32 390 33/38 330 39/46 270 47/55 220 56/68 180
The CINT value can be optimized experimentally for each application choosing the lower value that in correspondance of the lower ringing frequency,
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the minimum line lenght and the higher number of ringers doesn't produce false off-hook detection.
L3000S - L3092
ELECTRICAL CHARACTERISTICS (VDD = +5V; VSS = -5V; VB+ = +72V; VB- = -48V; Tamb = +25C) Note: Testing of all parameters is carried out at 25. Characterization as well as the design rules used allow correlation of tested performances at other temperatures. All parameters listed here are met in the range 0C to +70C. Functionalities are guaranteed in extended temperature range [-40C, +85C] by design and characterization. STANDBY
Symbol VLS ILCC Iot Hys Vls Parameter Output Voltage at L3000S Terminals Short Circuit Current Off-hook Detection Threshold Off-hook/on-hook Hysteresis Simmetry to Ground Test Conditions I Line = 0mA 8.8 5.3 1.5 Min. Typ. 43 12.5 8.8 2.5 .75 Max. Unit V mA mA mA V
CONVERSATION
Symbol VLO Ilim Iot Hys Ilgk Parameter Output Voltage at L3000S Terminals Current Programmed Through the LIM and AUT Inputs Off-hook Detection Threshold Off-hook/on-hook Hysteresis Longitudinal Line Current with GDK Detect Test Conditions I Line = 0mA Ilim -10% 5.6 1.5 6.5 Min. Typ. 43 Ilim +10% 9.8 2.5 15 Max. Unit V mA mA mA mA
POWER-DOWN
Symbol VCN VCF ICOM Parameter Input Voltage at Pin COMP to Set the Output Pin ONHK = 1 Input Voltage at Pin COMP to Set the Output Pin ONHK = 0 Output Current at Pin COMP COMP = GND 100 20 Test Conditions Min. Typ. Max. -100 Unit mV mV A
SUPPLY CURRENT
Symbol IDD Positive Supply Current CS = 1 Parameter Power Down/aut. Stand-by Stand-by Conversation Ringing Power Down/aut. Stand-by Stand-by Conversation Ringing Power Down/aut. Stand-by Stand-by Conversation Ringing Power Down/aut. Stand-by Stand-by Conversation Ringing Min. Typ. 5.7 7.5 11.7 11.3 4.2 4.2 8.2 8.2 0 2 5 14 0 10 10 12 2.5 6.5 17 15 15 13.5 Max. Unit mA mA mA mA mA mA mA mA mA mA mA mA A A A mA
ISS
Negative Supply Current CS = 1
IBAT-
Negative Battery Supply Current Line Current = 0mA
IBAT+
Positive Battery Supply Current Line Current = 0mA
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L3000S - L3092
AC OPERATION
Symbol Zlx THD Rl Thl Parameter Sending Output Impedance on TX Signal Distortion at 2W and 4W Terminals 2W Return Loss Transhybrid Loss Vtx = 0dBm @ 1020Hz f = 300 to 3400Hz f = 300 to 3400Hz 20log10 Sending Gain (1) Sending Gain Flatness vs. Frequency Sending Gain Linearity 22 30 Test Conditions Min. Typ. Max. 15 0.3 Unit % dB dB
VR VS
-6.27 -0.1 -0.1 -6.02 -5.77 +0.1 +0.1 dB dB dB
Gs Gsf Gl
Vso = 0dBm; f = 1020Hz f = 300 to 3400Hz Respect to 1020Hz fr = 1020Hz Vsoref = -10dBm Vso = +4 / -40dBm Vrl = 0dBm; f = 1020Hz f = 300 to 3400Hz Respect to 1020Hz fr = 1020Hz Vrlref = -10dBm Vrl = +4 / -40dBm
Gr Grf Grf
Receiving Gain Receiving Gain Flatness Receiving Gain Linearity
-0.25 -0.1 -0.1
+0.25 +0.1 +0.1
dB dB dB
Np4W Np4W SVRR
Psophomet. Noise 4W - Tx Terminals Psophomet. at Line Terminals Supply Voltage Rejection Ratio Relative to VB- f = 10Hz Vn = 100mVrms f = 1KHz Vn = 100mVrms f =3.4KHz Vn = 100mVrms 52 48
-79 -75 -20
-74 -70 -35 -30
dBmp dBmp dB dB dB dB
Ltc Tlc
Longitudinal to Transversal Conversion Transversal to Longitudinal Conversion
f = 300 to 3400Hz I line = 30mA ZML = 600
51
dB
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L3000S - L3092
RINGING PHASE
Symbol Vir Vacr Parameter Superimposed DC Voltage Ringing Siganl at Line Terminal Test Conditions Rloop > 100K Rloop = 1K Rloop > 100k VRGN = 1.5Vrms/30Hz Rloop = 1K + 1F VRGN = 1.5Vrms/30Hz If Ilim Vrs THDr Zir Vrr Trt Toh DC Off-hook Del Threshold Output Current Capability Ringing Symmetry Ringing Signal Distortion Ringing Amplicat. Input Impedance Residual of Ringing Signal at Tx Output Ring Trip Detection Time Off-hook Status Delay after the Ringing Stop fring = 25Hz (T = 1/fring) CINT = 470nF 80(3T) 50 L3092's Pin RGIN 50 100 85 Min. 19 17 56.0 56.0 5.5 130 2 5 Typ. Max. 27 25 Unit V V Vrms Vrms mA mA Vrms % K mVrms ms s
DIGITAL INTERFACE ELECTRICAL CHARACTERISTICS (VDD = +5V; VSS = -5V; Tamb = 25C) Note: Testing of all parameters is carried out at 25. Characterization as well as the design rules used allow correlation of tested performances at other temperatures. All parameters listed here are met in the range 0C to +70C. Functionalities are guaranteed in extended temperature range [-40C, +85C] by design and characterization. STATIC ELECTRICAL CHARACTERISTICS
Symbol Vil Vih Vil Vih lil lih Vol Voh Ilk IMR Parameter Input Voltage at Logical "0" Input Voltage at Logical "1" Input Voltage at Logical "0" Input Voltage at Logical "1" Input Current at Logical "0" Input Current at Logical "1" Output Voltage at Logical "0" Output Volatge at Logical "1" Tristate Leak Current Pull-up MR Output Current Test Conditions Pins CS PWON LIM Pins RNG-AUT All logic pins Vil = 0V Vih = 5V Min. 0 2 0 2.3 Typ. Max. 0.8 5 0.5 5 15 25 0.4 2.4 10 50 Unit V V V V A A V V A A
Pins ONHK GDK Iout = -1mA Iout = 1mA CS = "1" MR = "0"
DYNAMIC ELECTRICAL CHARACTERISTICS
Symbol Tsd Thd Tww Thv Tvh Twr Parameter PWON, RING, AUT, LIM PWON, RING, AUT, LIM CS Impulse Width (writing op.) ONHK, GDK Data Out to "0" CS Delay ONHK, GDK High Imped. to "1 "CS Delay CS Impulse Width (writing op.) 800 Test Conditions Min. 1500 0 1500 600 600 Typ. Max. Unit ns ns ns ns ns ns 17/32
L3000S - L3092
Figure 8: Writing Operating Timing (controller to SLIC).
Figure 9: Reading Operating Timing (from SLIC to controller).
Figure 10: Test Circuit
L3000S
A, B, C, D are test reference points used during testing.
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L3000S - L3092
Figure 11: Typical Application Circuit with 2nd Generation COMBO for Complete Subscriber Circuit (Protection - SLIC - COMBO).
L3000S
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L3000S - L3092
Figure 12: Typical Application Circuit with 1st Generation COMBO for Complete Subscriber Circuit (Protection - SLIC - COMBO).
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L3000S
L3000S - L3092
APPENDIX A SLIC TEST CIRCUITS Referring to the test circuit reported at the end of each SLIC data sheet here below you can find the proper configuration for each measurement. In particular: TEST CIRCUITS Figure A1: Symmetry to Ground
A-B: Line terminals C: Tx sending output on 4W side D: Rx receiving input on 4W Side E: TTx teletaxe signal input RGIN: low level ringing signal input.
Figure A2: 2W Returns Loss
RL = 20 log
| ZML - Z | | 2Vs | = 20 log | ZML + Z | |E|
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L3000S - L3092
TEST CIRCUITS (continued) Figure A3: Trans-hybrid Loss.
Figure A4: Sending Gain
Figure A5: Receiving Gain
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L3000S - L3092
TEST CIRCUITS (continued) Figure A6: PSRR Relative to Battery Voltage VB-
Figure A7: Longitudinalto Transversal Conversion
Figure A8: Longitudinalto Transversal Conversion
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L3000S - L3092
TEST CIRCUITS (continued) Figure A9: TTX Level at Line Terminals
Figure A10: Ringing Simmetry
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L3000S - L3092
APPENDIX B ADDITIONAL OPERATING FEATURES Two further operating modes are provided on the L3092, boosted battery and ring pause. Both of these Modes are accessed by appllying a high impedance on inputs AUT and or RING of the digital interface. 1.Boosted Battery (BB) This operating mode is equivalent to conversation mode with respect to AC and signaling functions but with the following changes to the DC characteristics: a) Current limiting value fixed at 25mA. b) Characteristic in the resistive feeding region corresponds to a battery voltage equal to (-5 + |VB-| + VB+)Volt in series with the same feeding resistor utilized in the DC characteristic of conversation mode. BB mode is typically used to feed long lines (20mA/4Kohm) and to implement special functions such as message waiting where high voltage signals are required. Further information about this opersating mode may be found by referring to the L3000S/L3030 datasheet. 2.Ringing Pause Mode During Ring Pause - Mode the SLIC is always in ringing mode but the AC ringing signal is not injected into the line. This mode allows to avoid any common mode voltage variation of TIP and RING wire during the transition bteween Ringing Burst and Ringing Pause. This feature is used in application where it is mandatory to avoid perturbations on adjacent lines during ringing injection. For example when in the same system analog lines are used both for speech and modem transmission. The following table shows all operating modes of L3000S/L3092 SLIC KIT. Boosted Battery or Ringing Pause Modes are selected by applying a high impedance (HI) to input pins RNG and/or AUT. Included also in this table are the operating modes to which the SLIC defaults automatically during ringing mode when OFF HOOK is detected.
CONTROL INTERFACE BETWEEN THE SLIC AND THE CARD CONTROLLER
Operating Mode Conversation 25mA Conversation 40mA Conversation 60mA Boosted Battery 25mA Stand-by Automatic Stand-by Power Down Test Mode Ringing Inj. (CVS 25mA) Ringing Inj. (CVS 40mA) Ringing Inj. (CVS 60mA) Ringing Inj. (BB 25mA) Ringing Pause (CVS 25mA) Ringing Pause (CVS 40mA) Ringing Pause (CVS 60mA) Ringing Pause (BB 25mA)
NB: HI = High Impedance BB = Boosted Battery
Input Pin RNG 0 0 0 0 0 1 1 0 1 1 1 1 HI HI HI PWON 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 AUT 1 0 0 HI 0 1 0 1 1 0 0 HI 1 0 0 LIM X 1 0 X X X X X x 1 0 X X 1 0 1 on-hook 0 off-hook ONHK 1 on-hook 0 off-hook
Output Pin GDK 1 Ground key not detected 0 Ground key detected Disable C1 Comparator Output 1 on-hook 0 off-hook Disable 0 Limiting Region 1 Resistive Region
Disable
HI
1
HI
X
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L3000S - L3092
APPENDIX C LAYOUT SUGGESTIONS Standard layout rules should be followewd in order to get the best system performances: 1) Use always 100nF filtering capacitor close to the supply pins of each I.C. 2) Connect together BGND and AGND at a low impedance point. (e.g. on a ground plane common to the line card). 3) The L3092 bias resistor (RL) should be connected close to the corresponding pins of L3092 (REF and GND). Avoid any digital line to pass close to REF pin. Eventually screen REF pin with a GND track.
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L3000S - L3092
PLCC28 PACKAGE MECHANICAL DATA
DIM. MIN. A B D D1 D2 E e e3 F F1 G M M1 1.24 1.143 12.32 11.43 4.2 2.29 0.51 9.91 1.27 7.62 0.46 0.71 0.101 0.049 0.045 10.92 mm TYP. MAX. 12.57 11.58 4.57 3.04 MIN. 0.485 0.450 0.165 0.090 0.020 0.390 0.050 0.300 0.018 0.028 0.004 0.430 inch TYP. MAX. 0.495 0.456 0.180 0.120
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L3000S - L3092
PowerSO20 (Slug-Up) PACKAGE MECHANICAL DATA
DIM. A A2 a1 A4 A5 b c D (1) D1 D2 E e e3 E1 (1) E2 E3 G h L L1 N R R1 S V MIN. 3 0.1 0.8 0.15 0.4 0.23 15.8 9.4 0.9 13.9 1.12 10.9 2.7 5.8 0 0.8 1.6 10 (max) 0.6 0.5 0 (min.)8 (max.) 5 (min.)7 (max.) 0.024 0.020 mm TYP. 3.15 MAX. 3.7 3.3 0.25 1 0.25 0.53 0.32 16 9.8 1.1 14.5 1.42 11.1 2.9 6.2 0.1 1.1 1.1 MIN. 0.118 0.004 0.031 0.006 0.016 0.009 0.622 0.370 0.035 0.547 0.044 0.429 0.106 0.228 0.000 0.031 0.063 inch TYP. 0.124 MAX. 0.145 0.130 0.010 0.039 0.010 0.021 0.012 0.630 0.385 0.043 0.570 0.056 0.437 0.114 0.244 0.004 0.043 0.043
0.2
0.008
1.27 11.43
0.050 0.450
(1) "D and E1" do not include mold flash or protrusions. - Mold flash or protrusions shall not exceed 0.15 mm (0.006"). - Critical dimensions: "E", "a1", "e", and "G"
N
N A b e3 h x 45 e
E3 (slug width)
c DETAIL A a1 E
1
10
DETAIL A E2 E1
Gage Plane 0.35 - C-
S D1(slug widt ) h
L
SEATING PLANE GC (COPLANARITY)
20
11
PSO20DME
D
28/32
L3000S - L3092
PowerSO20 (slug-down) PACKAGE MECHANICAL DATA
DIM. A a1 a2 a3 b c D (1) E e e3 E1 (1) E2 G h L N S T 10.0 0.80 0 10.90 0 0.40 0.23 15.80 13.90 1.27 11.43 11.10 2.90 0.10 1.10 1.10 8 (max.) 0.3937 0.0314 10 (max.) 0.0433 0 0.4291 0.10 mm MIN. TYP. MAX. 3.60 0.30 3.30 0.10 0.53 0.32 16.00 14.50 0 0.0157 0.009 0.6220 0.5472 0.050 0.450 0.437 0.1141 0.0039 0.0039 MIN. inch TYP. MAX. 0.1417 0.0118 0.1299 0.0039 0.0209 0.0126 0.6299 0.570
(1) "D and E1" do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (0.006")
N
N a2 b e e3 A
R
c DETAIL B a1 E
DETAIL A D
lead
20 11
DETAIL A
a3 DETAIL B E2 T E1
Gage Plan e 0.35
slug
- C-
S
L
SEATING PLANE G C
(CO PLANARITY)
1
10
PSO20MEC
h x 45
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L3000S - L3092
DIP28 PACKAGE MECHANICAL DATA
DIM. MIN. a1 b b1 b2 D E e e3 F I L 4.445 3.3 15.2 2.54 33.02 14.1 0.175 0.130 0.23 1.27 37.34 16.68 0.598 0.100 1.300 0.555 mm TYP. 0.63 0.45 0.31 0.009 0.050 1.470 0.657 MAX. MIN. inch TYP. 0.025 0.018 0.012 MAX.
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L3000S - L3092
FLEXIVATT15 PACKAGE MECHANICAL DATA
DIM. A B C E F F1 G G1 H H1 H2 H3 L L1 L2 L3 L4 L5 N O R R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.8 0.37 mm TYP. 4.5 1.9 1.4 0.39 MAX. 4.65 2 0.42 0.57 0.97 2.1 26.85 29.3 MIN. 0.175 0.071 0.014 inch TYP. 0.177 0.075 0.055 0.015 MAX. 0.183 0.079 0.016 0.022 0.038 0.083 1.057 1.153
1.7 26.35 28.9
19.25 8.7 15.5 7.7
1.9 26.6 29.23 17 12.8 0.8 19.65 9.1 15.7 7.85 5 2.7 2.2 2 1.7 0.3 1.25 0.5
0.067 1.037 1.138
20.05 9.5 15.9 7.95
0.758 0.342 0.610 0.303
0.075 1.048 1.151 0.670 0.504 0.031 0.774 0.358 0.618 0.309 0.197 0.106 0.096 0.078 0.067 0.012 0.049 0.02
0.789 0.626 0.313
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
V3 H3 O
H H1 H2 R3 R4 V1 R2
N
A
L4 L2 L3 V2 L1 R2
R
L V1
G V
G1
F
F1
E
B C V
FLEX15ME
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L3000S - L3092
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved PowerSO-20TM is a Trademark of the SGS-THOMSON Microelectronics SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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